LED display true color technology

LED display true color technology
1, image acquisition technology

LED electronic display to show true color images, must first solve the real-time acquisition of video signals, analog video signal acquisition for digital video images. Early practice is to use the video capture card and some of the characteristics of the port (Feature-connect) VGA card combined to achieve.

The video capture card is used to capture the video image, and then through the VGA feature port to obtain the field frequency, line frequency, pixel frequency, and the index address of the color lookup table, when tracking the CRT image can be copied through the color lookup table method to obtain the red, green, blue separation of the digital signal. One method is to use software timing copy, the other is to use hardware steganography, the latter is more effective and fast.

Because of this technology exists with the above VGA card compatibility, edge is not clear, poor image quality and other shortcomings, the electronic display of the image displayed by the quality of the limitations, for this reason, the Beijing Galaxy Computer Company in 1998 developed a special LED electronic display video card JMC-LED.

The card is based on PCI bus, using 64-bit graphics gas pedal, VGA and video functions into one, responsible for video data and VGA data superimposed on the color space transformation, from the fundamental solution to the compatibility problem. Apply full-screen resolution acquisition, YUV4:2:2 uncompressed storage technology to ensure the optimization of video images, the video window using EST edge enhancement technology to ensure the clarity of the image after scaling. Support system for PAL and NTSC, the video window can be scaled and moved arbitrarily.

The card can extract several synchronization signals of field frequency, line frequency and pixel point frequency required for video playback on electronic display, and separate the red, green and blue signals. Digital RGB format is 8:8:8, each can produce 256 levels of gray scale, can meet the requirements of electronic display screen true color playback.

2, real image color reproduction

Full-color LED electronic display screen visual principle and color television sets, is through the red, green, blue three colors of different light intensity to achieve the image color reduction reproduction. The purity of red, green, blue directly affects the visual effect of image color reproduction. However, the three-color ratio of white light is not a simple superposition of three colors.

First, under the premise of ensuring the purity of light frequency, the ratio of red, green and blue light intensity must be close to 3:6:1;
Second, due to people's visual sensitivity to the red, the red light source is required in the space to be decentralized distribution;
Third, due to people's vision on the red, green, blue three colors of light intensity of different non-linear curve response, requiring different light intensity of white light on the red, green, blue to be similar to the TV set in the γ correction;
Fourth, human vision has limited ability to distinguish color difference. Therefore, it is necessary to find out the objective indicators of image color reproduction authenticity. In order to reproduce the real image color, in the LED electronic display screen light distribution should meet some of the following requirements:?

① red, green, blue wavelength should be: 660nm, 525nm, 470nm or so;?
② 4 tube unit with white light is good (multi-tube unit can also depend on the light intensity);?
③ red, green, blue gray level of 256 levels;?
④ must be used for the LED pixel tube nonlinear correction.

Red, green and blue light distribution and non-linear correction can be realized by display control system hardware, can also be realized by the playback system software.

3、Dedicated display driver circuit

From the current pixel tube of several display methods, can be divided into: ① scanning drive; ② DC drive; ③ constant current source drive. For indoor dot-matrix block screen, the general use of scanning; for outdoor pixel tube screen, to ensure that the displayed image consistency is good, stable, high brightness, must be used DC drive plus constant current source mode.

Most of the earlier LED electronic display driver circuit using low-voltage signal series and conversion CMOS circuit and high-current drive bipolar circuit composed of two (such as 74HC595 + MC1413/UNL2803, CD4094/MC14094 + MC1413, 74HC164 + 74HC273 + MC1413), this form of driver circuit There are many welding points, high cost, low reliability and other issues.

For these shortcomings, the U.S. TI company developed and produced TPIC6B595 (TPIC6C595) special integrated circuits (ASIC), which will be the serial-parallel conversion and high-current drive into one, this ASIC has the following significant features: parallel output drive capability, single drive current up to 200mA, can be directly driven by the LED; wide range of current and voltage, the operating voltage can be chosen in 5 ~ 15V within the flexibility of choice; serial input, shift and latch, clock input port are equipped with Schmidt shaping circuit; serial and parallel output current is large, absorption and supply current are greater than 4mA, level of convenience; high data processing speed, serial clock frequency, fmax ≥ 25MHz is particularly suitable for multi-gray color display LED driver.

Wuxi Dongda Xianxing Microelectronics Co., Ltd. also produced in 1998 with TPIC6B595 fully compatible with the ASIC chip AMT9094/9095, but the price is greatly reduced. Due to the TPIC6B595 parallel output port is only 8-bit, drive a higher resolution full-color display requires a larger number of TPIC6B595, and 256-level grayscale control is more troublesome.

To this end, the U.S. TI company developed a LED electronic screen display driver special integrated circuit TLC5901/5902/5903, the advantages of this ASIC is: constant current source output 5 ~ 80mA (or 10 ~ 120mA); drive capacity of 80mA × 16Bits (or 120mA × 8Bits); PWM control of the 256-level grayscale display; brightness 32-level adjustable; clock-synchronized 8-bit parallel data input. The chip makes the 256-level grayscale control is more simple, constant-current source way to make the image display consistency is better, TQFP100 package makes the driver board area is greatly reduced.

On this basis, TI has developed a better performance of the LED driver special chip TLC5921. Beijing Hua Hong integrated circuit design company has also developed a good performance of the LED special integrated circuit 9701, this ASIC has the following salient features: contains 8 × 16 × 32 data scanning array to achieve the dynamic scanning from static to 1 / 32; data input scanning array and data Data input scanning array and data output grayscale control using two independent clocks; 8-bit parallel data input and 8-bit parallel data output cascade function; 16 data outputs, each end of the drive LED current up to 80mA or more, each end of the data output voltage is greater than 20V; data output 256 levels of grayscale; output has a mode selector can be used for odd and even frame selection; has a nonlinear correction control input.

4, brightness control D / T conversion technology

LED electronic display is arranged by many mutually independent pixels (light-emitting elements), due to the separation of pixels, determines the light-emitting control and drive can only be carried out digitally. The light-emitting state of these pixels is controlled synchronously and driven independently by the controller. A true color video display means that the brightness of each pixel has to be controlled separately and synchronously within the specified scanning time. The large screen is made up of tens of thousands of pixel points, which makes the system much more complex than a two-value display screen and places higher demands on the overall data transfer speed. It is clearly impractical to set up a conventional D/A for each pixel, and a solution must be found that minimizes the complexity of the system and provides the highest possible performance.

From the principle of vision, it is known that the average brightness of a pixel can be perceived by a person depending on its light-on/light-off duty cycle. In other words, as long as the pixel light on/off duty cycle is adjusted, the control of brightness can be realized. For LED electronic displays, this means that as long as the number representing the brightness of the pixel is converted to the time the pixel is illuminated (D/T conversion), that is to say, the brightness of the D/A conversion is realized out.
Let the period of screen data refresh be, the data controlling the brightness of any pixel is n-bit binary number D=bi2i (where bi=0 or 1), Ton is the luminous time corresponding to D, then the duty cycle of pixel light on/off is: d=Ton/Ts=D=bi2i. This expression can be realized with preset subtractive counters, but one counter per pixel will make the display circuit unusually complicated. The above equation is rewritten as: Ton/Ts=D=bi2i. The above equation is rewritten as Ton=Tsbi2i, which implies that the Ton can be divided into several time segments, since when small enough, a Ton synthesized from several separated time segments has the same visual effect as a continuous Ton of the same total length. Thus, there is generally, for n-bit binary data D=bi2i, the Ts will be divided into n segments and an appropriate time segmentation function f(i) will be chosen such that the ith segment Ti=Tsf(i), where 0 is the bright/extinction duty cycle of this pixel point. Since the function f(i) can be common to all pixel points, the above equation shows that as long as f(i) is used to uniformly control individual pixel points, a mutually independent yet synchronized D/T conversion can be achieved for all pixel points across the screen. For a single pixel point the above equation can be realized using the circuit of Fig. 1. In the figure, SFR is an 8-bit shift register, and the figure shows the waveform of the time division function f(i).

Large screen display driver circuit is usually used “serial shift + latch + drive” structure, in order to minimize the data transmission line. To realize the above equation at the same time the whole screen, as long as all ST signals unified by f (i) control can be. Of course, the premise of doing so is the requirement of the shift register is stored in the control data of each pixel point in the same power bit, which can be done through the pre-data processing.

5, data reconstruction and storage technology

There are two ways of organizing the memory: (i) PackedPixELMethod: i.e., all the bits of each pixel on the screen are stored centrally in a single memory; (ii) BitPlaneMethod: i.e., each bit of a pixel is stored in a different memory. Since multiple memory bodies are used, they can read out more pixel information at a time. Analyzing from the two kinds of storage structure, the use of bit plane structure is conducive to improving the display effect of LED screen.

In the block diagram of the entire LED display control circuit structure, the data reconstruction circuit completes the conversion of RGB data, combines the same power bits of different pixels together, and then stores them in the neighboring units, thus completing the recombination of the entire data in the form of bits.

Data reconstruction circuit mainly consists of four parts: 8-bit data parallel transmission circuit; 8-bit parallel - serial conversion circuit; 8-bit data latch circuit; 8-bit plus 1 counter. 8-bit data R / G / B by the synchronization of the pixel frequency after processing into the parallel latch, 8-bit plus 1 counter output feed pulse LD, 8-bit data at the same time, the 8-bit data is latched to the 8-bit parallel - serial conversion circuit, the clock control circuit to complete the parallel - serial conversion circuit clock control. -serial conversion circuit clock control. After the data is reconfigured, there is no longer one pixel value in a memory, but the same weighted bits of different pixel values. All the same weighted bits are stored together, thus forming a bit-plane storage structure in bits. The neighboring weights of each pixel must be taken out at readout according to the opposite rule.

The read and write address generators must satisfy a strict timing sequence. For the same memory chip, it can be divided into N slices (a pixel value is represented by N bits), and each slice represents a bit plane, and pixels are converted to write to the same memory by first writing 0 bits, then 1 bit, and finally N bits. For an 8Col×Row dot matrix display, each bit plane contains 8Col×Row bits. The internal organization of the memory depends on the logical connection relationship of the pixel tubes on the driver screen. According to the memory organization, the read address generator drives rows by columns and then bits by rows; the write address generator adopts the way of driving columns by bits and rows by columns, so as to ensure the synchronization of reading and writing and correctly synchronize the display of the original image information.
6, logic circuit design in the ISP technology

In the early LED electronic display screen display control circuit, a large number of conventional digital circuit system design, with digital circuits combined with complex control logic. In the conventional digital circuit system design, when the circuit design is completed, the circuit board must first be produced, and then install components, debugging. If the logic function of the circuit board does not meet the requirements must be re-designed to make the circuit board, and then re-tuning, until the logic function is realized. Obviously, this design method has a long design cycle, high cost, and poor reliability of the finished product, maintenance trouble. The use of ordinary programmable logic devices, although it can reduce the design and production of printed circuit boards, but in the modification of the logic still can not avoid the repeated insertion and removal of the device.

In-SystemProgrammable technology (In-SystemProgrammable, abbreviated ISP), refers to the user's own design of the target system or board for the reconfiguration of the logic device programming or the ability to repeatedly rewrite. While conventional PLDs are usually programmed and then assembled in use, PLDs with ISP technology are assembled and then programmed, and can be repeatedly programmed after they become products. The emergence of programmable technology in the system, from the practical realization of the logic designers for many years dreamed of “hardware design and modification of software” desire to make the digital system face a new look. After the adoption of ISP technology, the hardware design becomes as easy to modify as software, and the functions of the hardware can be modified at any time or change the configuration according to a predetermined program. This not only extends the use of the device, shorten the system debugging cycle, but also eliminates the separate programming of the device links, eliminating the device programming equipment, simplifying the target device site maintenance and upgrade work. ISP technology is also characterized by the use of system design software for logic input, input and the selected device is not relevant. Therefore, before the input can choose any kind of device, and even can choose a “virtual device” (VirtualDevice). After the input, the device is selected based on the simulation and adaptation results.

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